165 radhard msi logic ut54acs245/UT54ACTS245 radiation-hardened octal bus transceiver with three-state outputs features three-state outputs drive bus line directly radiation-hardened cmos - latchup immune high speed low power consumption single 5 volt supply available qml q or v processes flexible package - 20-pin dip - 20-lead flatpack description the ut54acs245 and the UT54ACTS245 are non-inverting octal bus transceivers designed for asynchronous two-way com- munication between data buses. the control function imple- mentation minimizes external timing requirements. the devices allow data transmission from the a bus to the b bus or from the b bus to the a bus depending upon the logic level at the direction control (dir) input. the enable input ( g ) dis- ables the device so that the buses are effectively isolated. the devices are characterized over full military temperature range of -55 c to +125 c. function table pinouts 20-pin dip top view 20-lead flatpack top view logic symbol enable g direction control dir operation l l b data to a bus l h a data to b bus h x isolation 1 2 3 4 5 7 6 20 19 18 17 16 14 15 dir a1 a2 a3 a4 a5 a6 v dd g b1 b2 b3 b5 8 13 a7 b6 b4 9 12 a8 b7 10 11 v ss b8 1 2 3 4 5 7 6 20 19 18 17 16 14 15 dir a1 a2 a3 a4 a5 a6 v dd g b1 b2 b3 b5 8 13 a7 b6 b4 9 12 a8 b7 10 11 v ss b8 (19) g g3 (2) a1 (3) a2 (4) (18) b1 (16) (17) b2 note: 1. logic symbol in accordance with ansi/ieee std 91-1984 and iec publication 617-12. a3 (5) a4 (6) a5 (7) a6 b3 (13) b6 (14) b5 (15) b4 (8) a7 (9) a8 (11) b8 (12) b7 (1) dir 3 en1 (ba) 3 en2 (ab) 1 2
radhard msi logic 166 ut54acs245/UT54ACTS245 logic diagram a1 a2 a3 a4 a5 a6 a7 a8 dir (1) (2) (19) (18) (3) (17) (4) (16) (5) (15) (6) (14) (7) (13) (8) (12) (9) (11) b1 b2 b3 b6 b5 b4 b8 b7 g
167 radhard msi logic ut54acs245/UT54ACTS245 radiation hardness specifications 1 notes: 1. logic will not latchup during radiation exposure within the limits defined in the table. 2. device storage elements are immune to seu affects. absolute maximum ratings note: 1. stresses outside the listed absolute maximum ratings may cause permanent damage to the device. this is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. recommended operating conditions parameter limit units total dose 1.0e6 rads(si) seu threshold 2 80 mev-cm 2 /mg sel threshold 120 mev-cm 2 /mg neutron fluence 1.0e14 n/cm 2 symbol parameter limit units v dd supply voltage -0.3 to 7.0 v v i/o voltage any pin -.3 to v dd +.3 v t stg storage temperature range -65 to +150 c t j maximum junction temperature +175 c t ls lead temperature (soldering 5 seconds) +300 c jc thermal resistance junction to case 20 c/w i i dc input current 10 ma p d maximum power dissipation 1 w symbol parameter limit units v dd supply voltage 4.5 to 5.5 v v in input voltage any pin 0 to v dd v t c temperature range -55 to + 125 c
radhard msi logic 168 ut54acs245/UT54ACTS245 dc electrical characteristics 7 (v dd = 5.0v 10%; v ss = 0v 6 , -55 c < t c < +125 c) symbol parameter condition min max unit v il low-level input voltage 1 acts acs 0.8 .3v dd v v ih high-level input voltage 1 acts acs .5v dd .7v dd v i in input leakage current acts/acs v in = v dd or v ss -1 1 a v ol low-level output voltage 3 acts acs i ol = 12.0ma i ol = 100 a 0.40 0.25 v v oh high-level output voltage 3 acts acs i oh = -12.0ma i oh = -100 a .7v dd v dd - 0.25 v i oz three-state output leakage current v o = v dd and v ss -30 30 a i os short-circuit output current 2 ,4 acts/acs v o = v dd and v ss -300 300 ma i ol output current 10 (sink) v in = v dd or v ss v ol = 0.4v 12 ma i oh output current 10 (source) v in = v dd or v ss v oh = v dd - 0.4v -12 ma p total power dissipation 2, 8, 9 c l = 50pf 2.0 mw/mhz i ddq quiescent supply current v dd = 5.5v 10 a i ddq quiescent supply current delta acts for input under test v in = v dd - 2.1v for all other inputs v in = v dd or v ss v dd = 5.5v 1.6 ma c in input capacitance 5 = 1mhz @ 0v 15 pf c out output capacitance 5 = 1mhz @ 0v 15 pf
169 radhard msi logic ut54acs245/UT54ACTS245 notes: 1. functional tests are conducted in accordance with mil-std-883 with the following input test conditions: v ih = v ih (min) + 20%, - 0%; v il = v il (max) + 0%, - 50%, as specified herein, for ttl, cmos, or schmitt compatible inputs. devices may be tested using any input voltage within th e above specified range, but are guaranteed to v ih (min) and v il (max). 2. supplied as a design limit but not guaranteed or tested. 3. per mil-prf-38535, for current density 5.0e5 amps/cm 2 , the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pf/mhz. 4. not more than one output may be shorted at a time for maximum duration of one second. 5. capacitance measured for initial qualification and when design changes may affect the value. capacitance is measured between the designated terminal and v ss at frequency of 1mhz and a signal amplitude of 50mv rms maximum. 6. maximum allowable relative shift equals 50mv. 7. all specifications valid for radiation dose 1e6 rads(si). 8. power does not include power contribution of any ttl output sink current. 9. power dissipation specified per switching output. 10. this value is guaranteed based on characterization data, but not tested.
radhard msi logic 170 ut54acs245/UT54ACTS245 ac electrical characteristics 2 (v dd = 5.0v 10%; v ss = 0v 1 , -55 c < t c < +125 c) notes: 1. maximum allowable relative shift equals 50mv. 2. all specifications valid for radiation dose 1e6 rads(si) symbol parameter minimum maximum unit t plh data to bus 1 11 ns t phl data to bus 1 15 ns t pzl g low to bus active 2 12 ns t pzh g low to bus active 2 12 ns t plz g high to bus three-state 2 12 ns t phz g high to bus three-state 2 12 ns
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